Majority function

A majority gate is a logical gate used in circuit complexity and other applications of Boolean circuits. A majority gate returns true if and only if more than 50% of its inputs are true.

For instance, in a full adder, the carry output is found by applying a majority function to the three inputs, although frequently this part of the adder is broken down into several simpler logical gates.

Many systems have triple modular redundancy; they use the majority function for majority logic decoding to implement error correction.

A major result in circuit complexity asserts that the majority function cannot be computed by AC0 circuits of subexponential size.

For any x, y, and z, the ternary median operator ⟨x, y, z⟩ satisfies the following equations.

• ⟨x, y, y⟩ = y
• ⟨x, y, z⟩ = ⟨z, x, y⟩
• ⟨x, y, z⟩ = ⟨x, z, y⟩
• ⟨⟨x, w, y⟩, w, z⟩ = ⟨x, w, ⟨y, w, z⟩⟩

An abstract system satisfying these as axioms is a median algebra.

Other useful properties of the ternary median operator function include:

• given ⟨x, y, z⟩ = w, ⟨x, y, w⟩ = z
• ⟨¬x, ¬y, ¬z⟩ = ¬⟨x, y, z⟩
• ⟨x, y, x ⊕ y ⊕ z⟩ = ⟨x, y, ¬z⟩
• ⟨¬x, y, x ⊕ y ⊕ z⟩ = ⟨¬x, y, z⟩

Most applications deliberately force an odd number of inputs so they don't have to deal with the question of what happens when exactly half the inputs are 0 and exactly half the inputs are 1. The few systems that calculate the majority function on an even number of inputs are often biased towards "0", they produce "0" when exactly half the inputs are 0, for example, a 4-input majority gate has a 0 output only when two or more 0's appear at its inputs. In a few systems, the tie can be broken randomly.

For n = 1 the median operator is just the unary identity operation x. For n = 3 the ternary median operator can be expressed using conjunction and disjunction as xy + yz + zx.

For an arbitrary n there exists a monotone formula for majority of size O(n^5.3). This is proved using probabilistic method. Thus, this formula is non-constructive.

Approaches exist for an explicit formula for majority of polynomial size:

• Take the median from a sorting network, where each compare-and-swap "wire" is simply an OR gate and an AND gate. The Ajtai, Komlós, Szemerédi (AKS) construction is an example.
• Combine the outputs of smaller majority circuits.
• Derandomize the Valiant proof of a monotone formula.