IMPLY gate
Digital logic gate
| IMPLY gate truth table | ||
|---|---|---|
| Input | Output | |
| A | B | A → B |
| 0 | 0 | 1 |
| 0 | 1 | 1 |
| 1 | 0 | 0 |
| 1 | 1 | 1 |
The IMPLY gate is a digital logic gate that implements a logical conditional.
01Symbols
IMPLY can be denoted in algebraic expressions with the logic symbol right-facing arrow (→). Logically, it is equivalent to material implication, and the logical expression ¬A v B.
There are two symbols for IMPLY gates: the traditional symbol and the IEEE symbol. For more information see Logic gate symbols.
| Traditional IMPLY Symbol | IEEE IMPLY Symbol |
02Functional completeness
While the Implication gate is not functionally complete by itself, it is in conjunction with the constant 0 source. This can be shown via the following:
Thus, since the implication gate with the addition of the constant 0 source can create both the NOT gate and the OR gate, it can create the NOR gate, which is a universal gate.
Sources and credits
This article is adapted from the Wikipedia article “IMPLY gate”, written by its contributors and licensed under CC BY-SA 4.0. Fathomly has changed the layout, removed citation markers, navigation and maintenance notices, and adjusted punctuation. This adapted version is shared under the same license. For references, see the original article.
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